Semiconductor Testing · Topic 3 of 5
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Semiconductor test methods & measurements
How a test program applies stimuli, measures responses, evaluates results, and records classifications — and why methods differ by device.
Prerequisites
What you’ll learn
- How digital, analog/mixed-signal, memory, RF, and power devices are tested differently
- What a test program is and how it runs
- What test coverage does and does not mean
- How a simple test sequence flows, end to end
- Why measurement uncertainty and guard bands matter
Why it matters
Equipment is only half the story. The test program — the stimuli, measurements, limits, and sequence — is what actually decides whether a device passes. Understanding methods explains why a 'pass' means what it means.
Beginner intuition
A test program is a checklist run by a machine: set up the conditions, ask each question (stimulus), record each answer (measurement), and mark it against the answer key (limits).
Explanation
A test program applies defined stimuli to the device under test (DUT), measures the responses, compares them to limits, and records a classification. The same framework covers very different devices, but the specific methods depend on what the device does.
Digital parts are checked with logic patterns and timing; analog and mixed-signal parts with precise voltage, current, and frequency measurements; memories with addressing and pattern tests; RF parts with frequency-domain measurements; and power devices across high voltage and current. No single test list fits every product.
Whatever the device, the measurement setup must suit the electrical range and behaviour being measured, and the result is only trustworthy if the measurement itself is well understood — which is why calibration, repeatability, and guard bands matter.
Step-by-step process
- Apply power — Bring the DUT up within the defined test conditions.
- Check current — Measure current consumption against limits.
- Apply input pattern — Drive a defined test vector into the device.
- Capture response — Record the device's outputs.
- Compare to expected — Check outputs against the expected result.
- Evaluate timing — Where relevant, check timing/speed behaviour.
- Record pass/fail — Log the classification against the applicable limits.
Visual explanation
Key terminology
- Device under test (DUT)
- The device currently being tested.
- Test vector / pattern
- A defined set of inputs applied to the device.
- Test limit
- The bound a measurement must fall within to pass.
- Binning
- Sorting devices by test outcome.
- Calibration
- Adjusting the test system so measurements are accurate against a reference.
- Guard band
- A margin on a test limit that accounts for measurement uncertainty.
- Test coverage
- How much of a defined fault model or specification a test addresses.
- Scan / scan chain
- A DFT technique that chains flip-flops to shift test data in and out.
- Built-in self-test (BIST)
- Test logic built into the chip so it can test parts of itself.
- Design-for-testability (DFT)
- Designing a chip so it can be tested effectively.
- S-parameters
- A way of describing how an RF device responds across frequency (conceptually).
Example
Common mistakes
Watch out for:
- Treating scan/BIST as a replacement for production test rather than a complement.
- Reading a coverage percentage as a universal defect guarantee.
- Assuming a borderline measurement automatically means the device is defective.
Real-world application
The same tester runs very different programs for a memory, an RF front-end, and a power device — the method, not just the machine, is what makes the measurement meaningful.
Manufacturing & industry context
Test programs are developed, validated, and version-controlled as carefully as the silicon they qualify.
Test time is cost, so method choice constantly balances coverage against throughput.
Go deeper: engineering & research
Optional expandable sections that build from engineer to advanced to researcher level. The basics above are enough for a first read — open these when you want the depth.
Digital testingEngineer
- Logic states and levels; input/output behaviour; functional test patterns and truth tables.
- Timing and propagation delay; setup and hold time (conceptually).
- Scan testing / scan chains and built-in self-test (BIST) are design-for-testability (DFT) techniques built into the chip.
- Scan and BIST are not interchangeable with every form of external production test — they complement it.
Analog & mixed-signal testingEngineer
- Voltage and current measurements; gain and offset; linearity.
- Noise and distortion; frequency response.
- ADC and DAC testing; mixed-signal interactions between analog and digital blocks.
Key point
Memory testingEngineer
- Memory cells and arrays; read/write behaviour; addressing.
- Functional patterns and introductory fault models.
- Redundancy and repair; memory built-in self-test (MBIST); retention/timing where relevant.
Key point
RF & power-device testingAdvanced
These domains need measurement setups matched to their electrical range and behaviour.
- RF: frequency-dependent behaviour, gain, noise, linearity, matching, and S-parameters (conceptually).
- Power: leakage, breakdown behaviour, on-state resistance or voltage drop, switching behaviour, thermal considerations, and current/voltage handling.
Test-program fundamentalsEngineer
- DUT, test conditions, test sequence, test vectors/patterns, and test limits.
- Measurement resources, calibration, result logging, binning, and retest policies.
- Test-program version control — knowing exactly which program made a decision.
Key point
What test coverage meansAdvanced
- Detecting a specific fault is not the same as covering a defined set of fault models.
- Checking a functional specification is different again from screening for particular failure mechanisms.
- Coverage is relative to a chosen test strategy and fault model — it is not a universal guarantee that some percentage of all possible defects has been found.
Measurement uncertaintyAdvanced
- Resolution, accuracy, and repeatability bound what a measurement can tell you.
- Calibration, noise, contact resistance, and temperature dependence all affect the result.
- Guard bands tighten limits to account for uncertainty.
- A borderline measurement may warrant investigation rather than an automatic conclusion that the device is defective.
Test-method comparisonEngineer
| Device type | Mainly measures | Typical approach |
|---|---|---|
| Digital logic | Logic behaviour, timing | Functional patterns, scan/BIST |
| Analog / mixed-signal | Voltages, currents, linearity | Precise parametric measurement |
| Memory | Array read/write integrity | Address/pattern tests, MBIST, repair |
| RF | Frequency-domain behaviour | Gain/noise/matching, S-parameters |
| Power | High V/I behaviour, switching | Breakdown, leakage, Rds(on)/Vdrop, thermal |
Key takeaways
- A test program applies stimuli, measures responses, compares to limits, and records a classification.
- Digital, analog/mixed-signal, memory, RF, and power devices need different methods.
- Coverage is relative to a fault model/strategy — not a universal defect guarantee.
- Measurement uncertainty and guard bands are why a borderline result is investigated, not assumed.
References
- VLSI Test Principles and Architectures: Design for Testability — L.-T. Wang, C.-W. Wu, and X. Wen (Morgan Kaufmann / Elsevier)
- Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits — M. L. Bushnell and V. D. Agrawal (Springer)
Check your understanding
Quick self-check — not a test, and nothing is recorded.
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