Semiconductor Testing · Topic 4 of 5

Semiconductor TestingLesson 4 of 5

Test yield, defect analysis & reliability

How test results become yield metrics, how failures are investigated, and how reliability differs from yield.

Prerequisites

Semiconductor test methods & measurements →

What you’ll learn

The different yield metrics and why they can't be compared blindly
Common test outcomes — and why a failure is an observation, not a proven cause
A conceptual failure-investigation flow, and how to separate tester problems from device faults
Failure-analysis techniques at a conceptual level
How reliability and qualification differ from production yield
Why uncontrolled retesting can distort reported yield

Why it matters

Test data is the richest information source in manufacturing — but only if it's read carefully. Confusing an observed failure with a proven defect, or comparing yield numbers that mean different things, leads to wrong decisions. This module is about reading test results honestly.

Beginner intuition

Think of yield like a series of sieves: each stage lets fewer through, and each sieve counts 'what went in' differently — so you can't compare the sieves' percentages without knowing what each one measured.

Explanation

Yield is the fraction of devices that pass — but there are several yields (wafer, die, assembly, final test, overall), and organisations define them with different denominators. A yield number is meaningless without knowing what it counts.

A test failure is an observation that needs interpretation. The same failing measurement could be a real device defect, a test-system or contact problem, or a condition-specific effect. Investigation — not assumption — establishes the cause.

Reliability is a different question from yield. Yield asks 'does it work now?'; reliability asks 'will it keep working?'. The two are assessed by different activities (production test, screening, characterization, qualification) that are easy to conflate.

Step-by-step process

Test failure observed — A measurement falls outside its limits.
Confirm test conditions — Check the device was tested under the intended conditions.
Check setup & contact — Rule out a measurement-setup or contact problem.
Reproduce the result — Does the failure repeat, or was it a one-off?
Compare related measurements — Look at neighbouring parameters for clues.
Localize the failure — Narrow down where the problem is, where possible.
Investigate possible causes — Consider physical or electrical mechanisms.
Validate the root cause — Confirm the cause — don't assume it.
Apply corrective action — Fix the cause (process, design, test, or handling).
Verify the result — Confirm the action actually resolved it.

Visual explanation

An illustrative yield funnel: dies on the wafer narrow to those passing wafer sort, then packaged devices, then those passing final test. The numbers are hypothetical, not industry values.

Key terminology

First-pass yield: The fraction that passes without any retest.
Escape: A defective device that passes test and ships.
Root cause: The validated underlying reason for a failure (not just the symptom).
Accelerated stress test: Applying elevated stress to surface failure mechanisms faster.
Qualification: Evaluating whether a product/process meets reliability requirements, on samples.
Screening: Removing weak units from a population (e.g. burn-in).
Characterization: Understanding how a device behaves across conditions.
Failure rate: How often devices fail over time (introductory concept).

Example

Illustrative: a device fails a leakage test. That's an observation — it could be a real defect, a dirty contactor, or a temperature effect. Only after reproducing it, ruling out the setup, and localizing it is a root cause validated. Reporting it as 'a process defect' before that would be a guess.

Common mistakes

Watch out for:

Comparing yield numbers from different stages without checking their definitions.
Treating a single test failure as proof of a specific manufacturing defect.
Retesting until a part passes and counting it as good without understanding why it first failed.
Confusing reliability (over time) with yield (now).

Real-world application

Yield learning — correlating test data across stages to find and fix systematic losses — is one of the biggest levers on a product's profitability.

Manufacturing & industry context

Test data feeds yield learning across manufacturing stages and is correlated to find systematic issues.

Supplier quality (materials, equipment, assembly) feeds directly into yield and reliability.

Go deeper: engineering & research

Optional expandable sections that build from engineer to advanced to researcher level. The basics above are enough for a first read — open these when you want the depth.

Yield metrics (and why not to compare them blindly)Engineer

Yield	Roughly counts
Wafer yield	Good wafers / wafers started
Die yield	Good dies / total dies on the wafer
Assembly yield	Good assemblies / units assembled
Final-test yield	Units passing final test / units tested
Overall yield	Good shippable units / material started
First-pass yield	Pass without any retest

Different yields count different things

Exact definitions and denominators vary between organisations.
Yields from different stages must not be compared without understanding their definitions.
Illustrative only: 1,000 dies → 800 pass wafer sort → 800 packaged → 760 pass final test. These are hypothetical, not benchmarks.

Common test outcomesEngineer

Functional, parametric, timing, and leakage failures.
Intermittent, contact-related, and temperature-sensitive failures.
Failures that appear only under particular operating conditions.
A failure is an observation requiring interpretation — not automatic proof of a specific manufacturing defect.

Failure-analysis techniques (conceptual)Advanced

A toolkit exists; the right tool depends on the suspected mechanism.

Electrical characterization and curve tracing (where applicable).
Thermal imaging; optical inspection; X-ray inspection.
Scanning electron microscopy; focused ion beam; cross-section analysis; emission microscopy.
Not every technique suits every device or failure — they are chosen to match the mechanism.

Key point

Conceptual overview only — not a laboratory procedure.

Reliability & qualificationAdvanced

Reliability asks whether a device keeps working over time and stress — distinct from production yield.

Accelerated stress testing uses temperature, humidity, thermal cycling, and mechanical stress to surface mechanisms faster.
Mechanism-specific concerns (e.g. electromigration) matter where relevant to the device.
Qualification evaluates a product/process on samples; ongoing production monitoring is a separate, continuous activity.
Failure-rate and lifetime models exist at an introductory level — no single model fits every product.

Key point

Reliability standards exist (e.g. JEDEC JESD documents; automotive programmes reference AEC-Q documents), but scope and applicability vary by product — none is universal, and no specific numbers are given here.

Four distinct activitiesEngineer

Activity	Question
Production test	Does this unit meet spec now?
Screening (e.g. burn-in)	Can we remove weak units from the population?
Characterization	How does the device behave across conditions?
Qualification	Does the product/process meet reliability requirements (on samples)?

Don't conflate these

Retesting & false failuresEngineer

Retesting happens because contact or setup issues can create misleading results.
A repeatable failure deserves investigation; a one-off may be a setup artefact.
Uncontrolled retesting can distort reported yield (retesting until it passes).
Pass-after-retest does not, by itself, establish the root cause of the original failure.

Economics — an illustrative modelAdvanced

The cost of a defect generally rises the later it is caught — a qualitative principle, shown here illustratively.

Catch at wafer sort: lose the die, avoid packaging it.
Catch at final test: you've already paid to package it.
Escape to the customer: add returns, failure-analysis expense, and reliability/reputation risk.
So more test coverage (more test cost) is traded against yield loss, packaging cost, FA expense, and escape risk.

Key point

Assumptions are illustrative; the numbers and ordering are a teaching device, not industry benchmarks.

Key takeaways

There are several yields with different denominators — don't compare them blindly.
A failure is an observation needing interpretation, not a proven defect.
Reliability (will it keep working?) is distinct from yield (does it work now?).
Uncontrolled retesting and pass-after-retest can mislead — investigate repeatable failures.

References

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits — M. L. Bushnell and V. D. Agrawal (Springer)
VLSI Test Principles and Architectures: Design for Testability — L.-T. Wang, C.-W. Wu, and X. Wen (Morgan Kaufmann / Elsevier)
JEDEC reliability standards (JESD series) (JEDEC)Reliability test methods and qualification; scope varies by product.

Check your understanding

Quick self-check — not a test, and nothing is recorded.

1. Can you directly compare yield percentages from different manufacturing stages?

Yes — a percentage is a percentageNo — different yields use different denominators and must be understood before comparingOnly if they are from the same company

2. A failing device passes after a retest. Does that establish the root cause of the first failure?

Yes — passing on retest proves the first failure was a false alarmNo — pass-after-retest does not, by itself, establish the root causeYes — the device is always good if it passes once

Explore across Semitree

Continue the manufacturing journey

You now know how test data becomes yield, how failures are investigated, and how reliability differs from yield.

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