Stage 10 of 12Assembly, packaging & test
Testing
Screening good chips from bad.
What happens here?
Dies are tested on the wafer (wafer sort) and again after packaging (final test), often across voltage and temperature, so only chips that meet specification ship. Test data also feeds yield improvement.
Who participates
- OSAT / test houses
- ATE & probe-card suppliers
Technologies involved
- Wafer sort / probe
- Automated test (ATE)
- Burn-in
- Design-for-test (DFT)
Equipment required
- Wafer prober
- Automated test equipment (ATE)
- Probe cards
- Test handlers
- Burn-in ovens
- CD-SEM
- Optical scatterometry / ellipsometry
- Defect-inspection scanners
- Overlay metrology
Materials required
- Probe cards
- Test sockets
- Reference / calibration wafers
Skills required
- Test engineering
- ATE programming
- Design-for-test
- Reliability engineering
Research happening
- System-level test
- Adaptive / AI-driven test
- Burn-in reduction
Companies operating here
- Amkor Technology
- ASE Technology
- CG Power and Industrial Solutions
- HCLTech
- Kaynes Technology
- KLA
- Tata Electronics
From Semitree's directory (a curated sample) — types: Testing, OSAT.
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- Capacity· planned
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- Technology dependencies· planned