Wafer-level packaging equipment
The tools that build the package directly on the wafer — before dicing — so many packages are formed together, enabling very small, high-density parts.
In short
Wafer-level packaging (WLP) equipment forms the package while the chips are still on the wafer, rather than one die at a time. This makes very compact packages, processes many at once, and underpins fan-out and advanced packaging.
Why it matters
Doing packaging steps at wafer scale is efficient and enables the smallest packages (near the size of the die itself) and fan-out approaches that add more connections without a traditional substrate.
Beginner intuition
Traditional packaging handles one die at a time; wafer-level packaging keeps everything on the wafer and builds the connections there, then dices at the end.
It borrows wafer-fab-style steps — deposition, lithography, plating — and applies them to packaging.
Where it fits in manufacturing
An alternative packaging path that overlaps front-end-style processing, used for WLP and fan-out package types; singulation comes at the end.
How it works
What goes in
- A wafer of finished dies (or a reconstituted wafer of dies in a carrier)
- Redistribution and bump materials
What happens inside
- Redistribute: build a redistribution layer (RDL) to route the die's pads outward.
- Bump: form solder bumps or balls for board connection.
- Singulate: dice the wafer into finished, packaged parts.
What comes out
- Individual, already-packaged parts once the wafer is diced.
Major subsystems
RDL processing
Deposition, lithography, and plating to build routing (fab-like tools).
Bumping
Forms the external solder connections.
Carrier / handling
Manages wafers or reconstituted carriers.
Process parameters that matter
- RDL line / space
- How fine the redistribution routing is.
- Bump uniformity
- Consistent, well-formed external connections.
- Warpage
- Reconstituted-wafer bow that challenges processing.
- Overlay / alignment
- Accurate routing to the die pads.
A note on numbers
Common issues
What can go wrong:
- RDL opens or shorts
- Bump non-uniformity
- Warpage-driven lithography errors
- Die shift in reconstituted wafers
Yield implications
Because many packages are built together, a systematic wafer-level error affects many parts at once — but the batch efficiency is a major advantage.
Advanced & research
Emerging and research directions, beyond today’s established practice.
- Fan-out wafer- and panel-level packaging
- High-density RDL for chiplets
- Panel-scale processing for cost
How this connects
Related process
Related concepts
Related materials
Related equipment
Packaging connection
WLP and fan-out are a bridge between wafer fabrication and packaging, using fab-style tools to build the package.
Packaging →Supply-chain connection
It draws on both the fab and packaging-materials supply chains (RDL, dielectrics, bumping).
Supply chain →