IC Design Flow · Topic 2 of 9
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IC Design FlowLesson 2 of 9
RTL
Describing behaviour at the register-transfer level in an HDL.
What you’ll learn
- What RTL is
- HDLs like Verilog/VHDL
- Why RTL is the design's source of truth
Why it matters
RTL is the human-written code that everything downstream is generated from.
Explanation
Register-transfer level (RTL) code describes how data moves between registers each clock cycle and the logic in between, using hardware description languages such as Verilog, SystemVerilog, or VHDL.
RTL is technology-independent and is the primary artefact designers write and verify.
Visual explanation
Key terminology
- RTL
- Register-transfer level description of hardware.
- HDL
- Hardware description language (Verilog/VHDL).
- Register
- A clocked storage element.
Example
An adder plus a register holding the result is a few lines of RTL.
Common mistakes
Watch out for:
- Writing RTL like software — it describes parallel hardware, not sequential code.
Real-world application
Reusable RTL 'IP blocks' are licensed and integrated across many chips.
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RTL
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Logic
IC Design Flow
The Boolean gates and flip-flops that implement digital functions.
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