Packaging
Protecting and connecting the die.
Learn → Understand → Explore → Calculate
At a glance
Inputs
- Known-good die
- Package substrate / leadframe
- Bond wires or bumps
- Mold compound
Outputs
- Packaged chip with external terminals
What is it?
Mounting the die in a package that protects it, connects it electrically to the outside world, and helps remove heat — from simple wire-bonded packages to flip-chip, 2.5D, and 3D stacks.
Why is it needed?
The bare die is fragile and its pads are microscopic. Packaging provides mechanical protection, usable electrical terminals, and a thermal path. Advanced packaging is now a key lever for performance where transistor scaling slows.
How does it work?
The die is attached to a substrate or leadframe, then connected — by wire bonding to pads, or by flip-chip bumps to the substrate — and usually encapsulated (molded) for protection.
Advanced schemes integrate multiple dies: interposers (2.5D), stacked dies and through-silicon vias (3D), chiplets, and high-bandwidth memory (HBM).
Critical parameters
- Thermal resistance (θ_JA)
- Interconnect reliability
- Warpage
- Signal/power integrity
Typical defects
- Delamination
- Bond/bump failures
- Voids in underfill
- Warpage-induced cracks
Equipment involved
- Die bonder
- Wire bonder
- Flip-chip bonder
- Molding equipment
Materials involved
- Package substrate
- Bond wire / solder bumps
- Underfill
- Mold compound
Keep going
Related concepts
Related tools
Related research
- Chiplets and heterogeneous integration
- 2.5D/3D stacking and HBM
- Panel-level packaging