Advanced packaging and chiplets: performance beyond scaling

For decades, progress meant smaller transistors. As that slows and gets costlier, a second axis has opened up: how you integrate dies together in a package.

Chiplets

Instead of one large monolithic die, a design is split into smaller chiplets — each potentially on a different process — and integrated in one package. Smaller dies yield better and can be mixed and matched.

2.5D, 3D, and HBM

• 2.5D places dies side-by-side on an interposer with dense wiring between them.
• 3D stacks dies vertically with through-silicon vias for the shortest interconnect.
• High-bandwidth memory (HBM) stacks DRAM to feed data-hungry AI accelerators.